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Third-party funded projects

State recognition of lithium batteries in the automotive sector

 2RCIn the turn from fossile to regenerative energies, the electification of vehicles is currently one of the important tasks. In that context, especially lithium ion batteries have proven to be competitive due to its high specific energy. Due to specific characteristics of that cell chemistry, existing methods from other chemistries cannot be applied easily.

The objectives of the efforts are new methods for the condition monitoring for Lithium batteries for use in vehicles, either for online or offline measurements.

Network-on-chip optimizations for objects with sparse matrices

Network-on-chipSparse Matrix-Vector-Multiplication (SMVM) appears in many scientific and engineering applications. Iterative methods (Jacobi method, conjugate gradient method, Lanczos method) are used to solve the underlying numerical problems, as e.g. solving sparse systems of linear equations or computing the eigenvalue decomposition of sparse matrices.

Since all these methods are based on SMVMs, various ways to speed up the SMVM on general purpose processors as well as parallel hardware structures were presented. However, all these approaches are strongly depending on a specific sparsity structure of the given matrix. Here, by using a Network-on-Chip (NoC) an approach for dealing with arbitrary sparsity structures is taken.

NoC architecture is the proposed concept for replacing the traditional bus-based on-chip interconnections by packet-based switch network architecture. Therefore, the packets (vector elements, matrix elements) can be freely distributed over the parallel hardware structure. Furthermore, there is a wide range of topologies of the NoC architectures and the used routing schemes. In this project the NoC architecture is used to deal with the highly irregular communication structure of parallel SMVM operations. The proposed SMVM-NoC realizes a chip–internal packet–based switch network as the main transmission network for the data transfers required for the SMVM computations. Meanwhile, the concept will also be realized in FPGA prototypes as well as an ASIC implementation using TSMC 45nm technology library.