VLSI Implementation of a Configurable IP Core for Quantized Discrete Cosine and Integer Transforms (bibtex)
by , ,
Abstract:
In this paper, a low-complexity and highly integrated IP Core for image/video transformations is presented. It can perform quantized 8x8 DCT and quantized 8 x 8/4 x 4 H.264 integer transforms on the presented configurable architecture using integer shift-add arithmetic operations. The MPEG-4/H.264 experimental and circuit simulation results show that the reconfigurable modules and the CORDIC-Scaler can not only approximate the arbitrary scaling values for different video standards efficiently but also achieve very high throughput and retain good transformation quality compared with the default methods in terms of PSNR. Therefore, the proposed IP Core is very suitable for low-complexity multi-purpose Video Codecs in SoC designs.
Reference:
C.-C. Sun, P. Donner, J. Götze, VLSI Implementation of a Configurable IP Core for Quantized Discrete Cosine and Integer Transforms, In International Journal of Circuit Theory and Applications, vol. 40, no. 11, pp. 1107-1126, 2012.
Bibtex Entry:
@Article{Sun2011,
  Title                    = {VLSI Implementation of a Configurable IP Core for Quantized Discrete Cosine and Integer Transforms},
  Author                   = {C.-C. Sun and P. Donner and J. G\"otze},
  Journal                  = {International Journal of Circuit Theory and Applications},
  Year                     = {2012},

  Month                    = {November},
  Number                   = {11},
  Pages                    = {1107-1126},
  Volume                   = {40},

  Abstract                 = {In this paper, a low-complexity and highly integrated IP Core for image/video transformations is presented. It can perform quantized 8x8 DCT and quantized 8 x 8/4 x 4 H.264 integer transforms on the presented configurable architecture using integer shift-add arithmetic operations. The MPEG-4/H.264 experimental and circuit simulation results show that the reconfigurable modules and the CORDIC-Scaler can not only approximate the arbitrary scaling values for different video standards efficiently but also achieve very high throughput and retain good transformation quality compared with the default methods in terms of PSNR. Therefore, the proposed IP Core is very suitable for low-complexity multi-purpose Video Codecs in SoC designs.},
  Doi                      = {10.1002/cta.774},
  Owner                    = {John Wiley}
}
Powered by bibtexbrowser