Sparse Matrix-Vector Multiplication Based on Network-on-Chip in FPGA

Sun, C.-C.; Götze, J.; Jheng, H.-Y.; Ruan, S.-J.

by C.-C. Sun, J. Götze, H.-Y. Jheng, S.-J. Ruan

Reference:

C.-C. Sun, J. Götze, H.-Y. Jheng, S.-J. Ruan, Sparse Matrix-Vector Multiplication Based on Network-on-Chip in FPGA, In Advanced Topics on Embedded Systems and Applications in 7th IEEE International Conferences on Embedded Software and Systems, Bradford, UK, 2010.

Bibtex Entry:

@Conference{Sun2010a,
  Title                    = {Sparse Matrix-Vector Multiplication Based on Network-on-Chip in FPGA},
  Author                   = {C.-C. Sun and J. G\"otze and H.-Y. Jheng and S.-J. Ruan},
  Booktitle                = {Advanced Topics on Embedded Systems and Applications in 7th IEEE International Conferences on Embedded Software and Systems},
  Year                     = {2010},

  Address                  = {Bradford, UK}
}